Model 990 Computer TMS 9900 Microprocessor Assembly Language Programmer's Guide

Company:Texas Instruments
Part:943441-9701 *A
Date:1979-12-15
Keywords:

Table of Contents

  • Section 1 Introduction
    • 1.1 Assembly Language Definition
    • 1.2 Assembly Language Application
  • Section 2 General Programming Information
    • 2.1 Byte Organization
    • 2.2 Word Organization
    • 2.3 Transfer Vectors
    • 2.4 Status Register
      • 2.4.1 Logical Greater Than
      • 2.4.2 Arithmetic Greater Than
      • 2.4.3 Equal
      • 2.4.4 Carry
      • 2.4.5 Overflow
      • 2.4.6 Odd Parity
      • 2.4.7 Extended Operation
      • 2.4.8 Status Bit Summary
    • 2.5 Memory Organization
    • 2.6 Privileged Mode
    • 2.7 Source Statement Format
      • 2.7.1 Character Set
      • 2.7.2 Label Field
      • 2.7.3 Operation Field
      • 2.7.4 Operand Field
      • 2.7.5 Comment Field
    • 2.8 Expressions
      • 2.8.1 Well-Defined Expressions
      • 2.8.2 Arithmetic Operators
    • 2.9 Constants
      • 2.9.1 Decimal Integer Constants
      • 2.9.2 Hexadecimal Integer Constants
      • 2.9.3 Character Constants
      • 2.9.4 Assembly-Time Constants
    • 2.10 Symbols
    • 2.11 Predefined Symbols
    • 2.12 Terms
    • 2.13 Character Strings
  • Section 3 Assembly Instructions
    • 3.1 General
    • 3.2 Addressing Modes
      • 3.2.1 Workspace Register Addressing
      • 3.2.2 Workspace Register Indirect Addressing
      • 3.2.3 Symbolic Memory Addressing
      • 3.2.4 Indexed Memory Addressing
      • 3.2.5 Workspace Register Indirect Auto-increment Addressing
    • 3.3 Program Counter Relative Addressing
    • 3.4 CRU Bit Addressing
    • 3.5 Immediate Addressing
    • 3.6 Addressing Summary
    • 3.7 Addressing Formats
      • 3.7.1 Format I -- Two Addressing Instructions
      • 3.7.2 Format II -- Jump Instructions
      • 3.7.3 Format II -- Bit I/O Instructions
      • 3.7.4 Format III -- Logical Instructions
      • 3.7.5 Format IV -- CRU Instructions
      • 3.7.6 Format V -- Register Shift Instructions
      • 3.7.7 Format VI -- Single Address Instructions
      • 3.7.8 Format VII -- Control Instructions
      • 3.7.9 Format VIII -- Immediate Instructions
      • 3.7.10 Format IX -- Extended Operation Instruction
      • 3.7.11 Format IX -- Multiply and Divide Instruction
      • 3.7.12 Format X -- Memory Map File Instruction
    • 3.8 Instruction Descriptions
    • 3.9 Arithmetic Instructions
    • 3.10 Add Words A
    • 3.11 Add Bytes AB
    • 3.12 Add Immediate AI
    • 3.13 Subtract Words S
    • 3.14 Subtract Bytes SB
    • 3.15 Multiply MPY
    • 3.16 Divide DIV
    • 3.17 Increment INC
    • 3.18 Increment By Two INCT
    • 3.19 Decrement DEC
    • 3.20 Decrement By Two DECT
    • 3.21 Absolute Value ABS
    • 3.22 Negate NEG
    • 3.23 Jump and Branch Instructions
    • 3.24 Branch B
    • 3.25 Branch and Link BL
    • 3.26 Branch and Load Workspace Pointer BLWP
    • 3.27 Return with Workspace Pointer RTWP
    • 3.28 Unconditional Jump JMP
    • 3.29 Jump If Logical High JH
    • 3.30 Jump If Logical Low JL
    • 3.31 Jump If High Or Equal JHE
    • 3.32 Jump If Low Or Equal JLE
    • 3.33 Jump If Greater Than JGT
    • 3.34 Jump If Less Than JLT
    • 3.35 Jump If Equal JEQ
    • 3.36 Jump If Not Equal JNE
    • 3.37 Jump On Carry JOC
    • 3.38 Jump If No Carry JNC
    • 3.39 Jump If No Overflow JNO
    • 3.40 Jump If Odd Parity JOP
    • 3.41 Execute X
    • 3.42 Compare Instructions
    • 3.43 Compare Words C
    • 3.44 Compare Bytes CB
    • 3.45 Compare Immediate CI
    • 3.46 Compare Ones Corresponding COC
    • 3.47 Compare Zeros Corresponding CZC
    • 3.48 Control and CRU Instructions
    • 3.49 Reset RSET
    • 3.50 Idle IDLE
    • 3.51 Clock Off CKOF
    • 3.52 Clock On CKON
    • 3.53 Load or Restart Execution LREX
    • 3.54 Set CRU Bit to Logic One SBO
    • 3.55 Set CRU Bit to Logic Zero SBZ
    • 3.56 Test Bit TB
    • 3.57 Load CRU LDCR
    • 3.58 Store CRU STCR
    • 3.59 Load and Move Instructions
    • 3.60 Load Immediate LI
    • 3.61 Load Interrupt Mask Immediate LIMI
    • 3.62 Load Workspace Pointer Immediate LWPI
    • 3.63 Load Memory Map File LMF
    • 3.64 Move Word MOV
    • 3.65 Move Byte MOVB
    • 3.66 Swap Bytes SWPB
    • 3.67 Store Status STST
    • 3.68 Store Workspace Pointer STWP
    • 3.69 Logical Instructions
    • 3.70 AND Immediate ANDI
    • 3.71 OR Immediate ORI
    • 3.72 Exclusive OR XOR
    • 3.73 Invert INV
    • 3.74 Clear CLR
    • 3.75 Set to One SETO
    • 3.76 Set Ones Corresponding SOC
    • 3.77 Set Ones Corresponding, Byte SOCB
    • 3.78 Set Zeros Corresponding SZC
    • 3.79 Set Zeros Corresponding, Byte SZCB
    • 3.80 Workspace Register Shift Instructions
    • 3.81 Shift Right Arithmetic SRA
    • 3.82 Shift Left Arithmetic SLA
    • 3.83 Shift Right Logical SRL
    • 3.84 Shift Left Logical SLL
    • 3.85 Extended Operation XOP
    • 3.86 Long Distance Addressing Instructions
    • 3.87 Long Distance Source LDS
    • 3.88 Long Distance Destination LDD
    • 3.89 Programming Examples
      • 3.89.1 ABS Instruction
      • 3.89.2 Shifting Instructions
      • 3.89.3 Incrementing and Decrementing
      • 3.89.4 Subroutines
      • 3.89.5 Interrupts
      • 3.89.6 Extended Operations
      • 3.89.7 Special Control Instructions
      • 3.89.8 CRU Input/Output
      • 3.89.9 TILINE Input/Output
      • 3.89.10 Re-Entrant Programming
  • Section 4 Assembler Directives
    • 4.1 Introduction
    • 4.2 Directives that Affect the Location Counter
      • 4.2.1 Absolute Origin AORG
      • 4.2.2 Relocatable Origin RORG
      • 4.2.3 Dummy Origin DORG
      • 4.2.4 Block Starting with Symbol BSS
      • 4.2.5 Block Ending with Symbol BES
      • 4.2.6 Word Boundary EVEN
      • 4.2.7 Data Segment DSEG
      • 4.2.8 Data Segment End DEND
      • 4.2.9 Common Segment CSEG
      • 4.2.10 Common Segment End CEND
      • 4.2.11 Program Segment PSEG
      • 4.2.12 Program Segment End PEND
    • 4.3 Directives that Affect the Assembler Output
      • 4.3.1 Program Identifier IDT
      • 4.3.2 Page Title TITL
      • 4.3.3 List Source LIST
      • 4.3.4 No Source List UNL
      • 4.3.5 Page Eject PAGE
    • 4.4 Directives that Initialize Constants
      • 4.4.1 Initialize Byte BYTE
      • 4.4.2 Initialize Word DATA
      • 4.4.3 Initialize Text TEXT
      • 4.4.4 Define Assembly-Time Constant EQU
    • 4.5 Directives that Provide Linkage Between Programs
      • 4.5.1 External Definition DEF
      • 4.5.2 External Reference REF
      • 4.5.3 Secondary External Reference SREF
      • 4.5.4 Force Load LOAD
    • 4.6 Miscellaneous Directives
      • 4.6.1 Define Extended Operation DXOP
      • 4.6.2 Program End END
  • Section 5 Pseudo-Instructions
    • 5.1 General
    • 5.2 No Operation NOP
    • 5.3 Return RT
  • Section 6 Assemblers
    • 6.1 General
    • 6.2 Prototyping System Assembler
      • 6.2.1 Terminal Executive Development System Assembler
    • 6.3 Program Development System Assembler
      • 6.3.1 Uses of Parenthesis in Expressions
      • 6.3.2 Right Shift Operator
      • 6.3.3 Logical Operators in Expressions
      • 6.3.4 Relational Operators in Expressions
      • 6.3.5 Output Options
      • 6.3.6 Workspace Pointer
      • 6.3.7 Copy Source File
      • 6.3.8 Conditional Assembly Directives
      • 6.3.9 Define Operation
      • 6.3.10 Transfer Vector
      • 6.3.11 Set Maximum Macro Nesting Level
      • 6.3.12 Set Right Margin
      • 6.3.13 Use of External Referenced Symbols in Expressions
      • 6.3.14 Symbolic Addressing Techniques
  • Section 7 Macro Language
    • 7.1 General
    • 7.2 Processing of Macros
    • 7.3 Macro Translator Interface with Assembler
    • 7.4 Macro Library
    • 7.5 Macro Language
      • 7.5.1 Labels
      • 7.5.2 Strings
      • 7.5.3 Constants and Operators
      • 7.5.4 Variables
      • 7.5.5 Model Statements
      • 7.5.6 Symbol Attribute Component Keywords
      • 7.5.7 Parameter Attribute Keywords
      • 7.5.8 Verbs
      • 7.5.9 $MACRO
      • 7.5.10 $VAR
      • 7.5.11 $ASG
      • 7.5.12 $NAME
      • 7.5.13 $GOTO
      • 7.5.14 $EXIT
      • 7.5.15 $CALL
      • 7.5.16 $IF
      • 7.5.17 $ELSE
      • 7.5.18 $ENDIF
      • 7.5.19 $END
    • 7.6 Assembler Directives to Support Macro Libraries
      • 7.6.1 LIBOUT Directive
      • 7.6.2 LIBIN Directive
      • 7.6.3 Macro Library Management
    • 7.7 Macro Examples
      • 7.7.1 Macro GOSUB
      • 7.7.2 Macro EXIT
      • 7.7.3 Macro ID
      • 7.7.4 Macro UNIQUE
      • 7.7.5 Macro GENCMT
      • 7.7.6 Macro LOAD
      • 7.7.7 Macro TABLE
      • 7.7.8 Macro LISTS
  • Section 8 Relocatability and Program Linking
    • 8.1 Introduction
    • 8.2 Relocation Capability
      • 8.2.1 Relocatability of Source Statement Elements
    • 8.3 Program Linking
      • 8.3.1 External Reference Directives
      • 8.3.2 External Definition Directive
    • 8.4 Program Identifier Directive
    • 8.5 Linking Program Modules
  • Section 9 Operation of the Macro Assembler
    • 9.1 General
    • 9.2 Operating the Macro Assembler
      • 9.2.1 Completion Messages
      • 9.2.2 Operating the Assembler in Batch Mode
  • Section 10 Assembler Output
    • 10.1 Introduction
    • 10.2 Source Listing
    • 10.3 Error Messages
      • 10.3.1 PX9ASM Error Codes
      • 10.3.2 SDSMAC Error Messages
      • 10.3.3 SDSMAC Warning Messages
      • 10.3.4 TXMIRA Error Messages
    • 10.4 Cross Reference Listing
    • 10.5 Object Code
      • 10.5.1 Object Code Format
      • 10.5.2 Machine Language Format
      • 10.5.3 Symbol Table
      • 10.5.4 Procedures for Changing Object Code
  • Appendix A Character Set
  • Appendix B Instruction Tables
  • Appendix C Program Organization
  • Appendix D Hexadecimal Instruction Table
  • Appendix E Alphabetical Instruction Table
  • Appendix F Assembler Directive Table
  • Appendix G Macro Language Table
  • Appendix H CRU Interface Example
  • Appendix I TILINE Interface Example
  • Appendix J Example Program
  • Appendix K Numerical Tables
  • Appendix L TMS 9940 Programming Considerations

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